No description
  • Tcl 41.5%
  • VHDL 32.7%
  • C 19.7%
  • SystemVerilog 5.6%
  • Makefile 0.5%
Find a file
Repository files (latest commit first)
Filename Latest commit message Latest commit date
2022-04-13 18:56:29 -04:00
ip_repo/pwm_gen_1.0 added command line interface and calculations work including hardware integration 2022-03-17 00:10:44 -04:00
SonicArrayPCB@2bf0606b6b Add PCB submodule 2022-04-13 18:54:10 -04:00
Vitis/theta_control added automatic phasing functionality 2022-03-20 20:02:11 -04:00
Vivado added command line interface and calculations work including hardware integration 2022-03-17 00:10:44 -04:00
.gitignore Added git ignore and theta control application 2021-11-10 13:41:40 -05:00
.gitmodules Add PCB submodule 2022-04-13 18:54:10 -04:00
README.md Initial Commit 2021-11-10 13:30:23 -05:00

theta_control